Adaptive DFE Utilizing Fixed Step Error Signal for Multi-Gb/s Serial Links

A new adaptation process presents in this paper for multi-Gb/s decision feedback equalizer DFE. The adaptation starts when a fix-step error signal is extracted from cross-points of received data symbols. The extracted signal is generated based on the invalidity of received data symbols with detection requirements at the detection unit. The iterations of the adaptation process search for the optimum feedback-tap coefficients to maximize the data eye-opening and optimize the adaptation-convergence time. The validity of the proposed architecture is evaluated by employing a serial link designed in an IBM 130 nm 1.2V CMOS technology. BSIM4 device models with Specter from Cadence Design Systems and variable channel lengths are utilized.