Voltage Boosted Schmitt Trigger Sense Amplifier (VBSTSA) With Improved Offset And Reaction Time For High Speed SRAMs

Sense amplifiers (SAs) provide amplification to a very small voltage change in the bit lines during the read operation. The sub-micron technology demands high performance sensing at extreme noise margins with better yield. This paper, presents a novel scheme “VBSTSA” with improved sigma offset and reaction time compared to conventional VLSA with minimal area impact. 22nm HKMG CMOS technology is used in this work. Our proposed VBSTSA has shown 48% lesser sigma offset and 4x times improvement in reaction time compared to conventional VLSA. This improvement leads to 10% better access time for a medium density memory instance. Implementation of VBSTSA is also presented in memory IO along with the modification in the self-time circuit to trigger the negative boost circuit in read cycle.