Steep Sub-threshold Slope Si and InGaAs Dopingless TFET: TCAD and ADS Simulation Based Investigation for Digital/Analog Applications

In this paper, a comparative study is presented for silicon and InGaAs-based DL-TFET for different circuit designs. Firstly, the silicon DL-TFET result is calibrated and its results are compared with InGaAs-based DL-TFET, among which, InGaAs-based DL-TFET shows better performance parameters. Hence, for designing the circuits, the Verilog-A model is used, in which the look-up table approach is adopted for designing the netlist. Subsequently, different digital and analog circuits are designed using both silicon and InGaAs-based DL-TFET. The CMOS inverter and 3-stage ring oscillator are investigated which shows the lowest propagation delay of the order of 3.1 ns and 0.39 ns respectively for InGaAs-based DL-TFET. Similarly, in an analog circuit, a common source amplifier is analyzed for variations in different circuit components; and it shows the highest gain of 2.98 for InGaAs-based DL TFET at
$V_{\text {DD }} 0.8 ~\mathrm{V}, \mathrm{R}_{\mathrm{B}}$
of
$3.2 \mathrm{K}\Omega$
, and
$\mathrm{R}_{\mathrm{L}}$
of
$1 \mathrm{M}\Omega$
. Hence, InGaAs-based DL-TFET shows the best circuit-level performance in comparison with silicon.