Design and Performance Assessment of GaSb/Si Heterojunction Vertical TFET with Delta Doped Layer for Enhanced DC and AF/RF Characteristics

In this study, we suggest a novel GaSb/Si Heterojunction incorporated with a delta-doped layer in a Vertical TFET (GaSb-VTFET). The motivation behind the work is to have improved SS with higher ON current and transconductance using Heterojunction structure with delta doped layer. So this device presents a superior performance by enhancing the vertical tunnelling current components and minimising the lateral components. The primary function of including the delta-doped layer in the channel is to diminish the OFF-state leakage components. Various DC characteristics parameters like SS, Vt, $\mathrm{I}_{\mathrm{ON}}/\mathrm{I}_{\mathrm{OFF}}$ and analogue/RF parameters are also explored for VTFETs with or without heterojunction. The proposed device’s comprehensive DC and analogue analysis is compared with a silicon-based source without doped layer (conventional) VTFET (Si-VTFET). The proposed GaSb-based source material with doped layer vertical TFET (GaSb-VTFET) shows enhanced characteristics. The proposed device satisfies the ITRS roadmap guidelines for low standby power by having $\mathrm{I}_{\mathrm{ON}}$ value 6x10$^{-5}$ A/$\mu$m, a standby power $\mathrm{I}_{\mathrm{OFF}}$ value 10$^{-18}$ A/$\mu$m with SS value 21 mV/decade. So GaSb-VTFET’s results suggest that it might be a good contender for ultra-low-power applications.