Advanced Encryption Standard-128 bit Design Flow for ZYNQ-7 ZC702 Evaluation Board

The study of cryptography techniques on Field Programmable Gate Array needs extensive research attention. Evaluation Boards is one such area of hardware security measures. An encryption algorithm must be developed on a specific family board. The Advanced Encryption Standard 128-bit algorithm is proposed in this study for the ZYNQ family board. Particularly, the ZYNQ-7 ZC702 Evaluation Board. Then, its parameters are appropriate for top-down encryption algorithms. The results of the algorithm are generated as reports on Register Transfer Logic (RTL) and look-up table usage. This study provides recommendations for the future in terms of data security on hardware.