A 1-to-5GHz All-Passive Frequency-Translational 4th-Order N-path Filter with Low-Power Clock Boosting for High Linearity and Relaxed $\mathrm{P}_{\text{dc}}$-Frequency Trade-Off

N-path filters have re-emerged as a promising solution to realize highly linear, highly compact, high-Q, tunable on-chip filters. However, N-path filters are restricted to low-GHz operation in modern CMOS (< 1.2GHz in 65nm CMOS) due to clocking challenges and switch parasitics [1]–[5]. Also, a traditional N-path filter realizes only a 2
^nd
-order response, and recent approaches to realize higher-order responses require subtracting N-path filters with different center frequencies using active devices [1], [5] or cascading multiple N-path filters coupled with inductors or active devices [2]–[4]. Inductors limit the frequency tunability and require large area, while active devices consume power and generate noise and distortion. Finally, N-path filters are restricted to ~0dBm power handling due to the power-handling limitations of CMOS switches. Here, we tackle these issues through (i) a frequency-translational RF N-path filter that exploits the inherent frequency-conversion of an N-path filter to implement the intermediary filter nodes in a higher-order filter at baseband (in this case with N-path elliptical-lowpass-filter loads), thus breaking the trade-off between the frequency of operation, CMOS technology node, and power consumption (Fig. 25.5.1), (ii) a low-power switched-capacitor clock-boosting circuit to enhance the power handling (Fig. 25.5.2), and (iii) inductively coupled N-path layers using overlapping N-phase clocks to reduce the pulse width of the clock and increase the operating frequency to 5GHz (Fig. 25.5.3). These innovations have enabled our BPF to operate across a wide range of 1 to 5GHz (>4× better than [1]–[5]) with +8.8dBm in-band IP1dB, +23dBm in-band IIP3, and +36dBm OOB IIP3 (10 to 100× better than prior works [1]–[5]), while maintaining comparable performance on other metrics.