Comparative Analysis and Review of FPGA Based FEC Codes

Forward error correction (FEC) codes corrects the error bits in transmission channel. The FEC codes are more suitable for applications like digital video broadcasting (DVB) satellite systems, cloud computing, and social networking applications. This manuscript reviews low-density parity-check (LDPC) codes, Bose-Chaudhuri-Hocquenghem (BCH) codes and concatenation of LDPC with BCH codes on field-programmable gate array (FPGA) and also the comparative results are discussed in detail. The FPGA-based architectures provide great flexibility, high-speed parallel architectures with lower cost than the application-specific integrated circuits (ASIC) platform. This manuscript discusses the commonly used recent encoding and decoding mechanisms for communication system on the FPGA platform. The performance analysis of LDPC codes, BCH code, and concatenation of LDPC with BCH codes are discussed. The performance metrics include chip area utilization (Slices and LUTs), frequency, and throughput parameters. Finally, the research findings and future challenges are addressed in detail.