Hardware Implementation of 64-Bits Data by Radix-8 FFT/IFFT for High Speed Applications

Decimation-in-time (DIT) is one of the efficient and handy approaches for calculating discrete Fourier transform (DFT) using fast Fourier transform (FFT). This paper disseminates the implementation of 64-bits IDFT using radix-8 IFFT butterfly structure for conversion of frequency domain signal into the time domain. Radix-8 DIT/FFT is utilized to implement the 64-bit data at first, then radix-8 IFFT is utilized to implement the output of the DIT/FFT to get the desired results. This design is further implemented in the FPGA board and simulation results along with synthesis reports are illustrated here. As per the results achieved the proposed model is found to be effective in reducing power consumption and processing time.