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We compare the prior art in phase interpolators (PIs), classifying them as current-mode, voltage-mode, and integrating-mode PI. Next, we present an integrating-mode PI where the voltage slopes with high phase linearity are generated through the integration of phase-shifted weighted current sources. The constant and variable voltage slopes are generated by current sources/sinks created using stacke...Show More
A 9b-Linear 14GHz Integrating-Mode Phase Interpolator in 5nm FinFET Process
2022 IEEE International Solid-State Circuits Conference (ISSCC)
Year: 2022 | Conference Paper |
Cited by: Papers (8)
Increased data-rates and multi-lane SerDes implementations impose stringent conditions for CDRs to produce low-jitter clocking that is capable of managing frequency and phase offsets. Consequently, high-speed phase interpolators (Pls) must be both low-power and compact for multi-lane requirements, but also high-resolution with respect to the clock period $(\mathrm{T}_{\text{period}})$, with high s...Show More
A New Boosted Active-Capacitor With Negative-Gm for Wide Tuning Range VCOs
A new boosted active-capacitor (BAC) architecture using LC-tuned active-impedance-conversion is presented. In the chosen frequency range, the proposed BAC acts as a tunable capacitance multiplier and negative-transconductance, but where the positive-transconductance is not multiplied. The BAC is used as a low-loss tunable capacitor bank element for designing a wide tuning range voltage-controlled ...Show More
Octave Frequency Range Triple-band Low Phase Noise K/Ka-Band VCO with a New Dual-path Inductor
Md Aminul Hoque;Mohammad Chahardori;Pawan Agarwal;Mohammad Ali Mokri;Deukhyoun Heo
2020 IEEE/MTT-S International Microwave Symposium (IMS)
Year: 2020 | Conference Paper |
Cited by: Papers (11)
This paper presents a triple-band voltage controlled-oscillator (VCO) with a new dual-path inductor. The change in inductance value of the proposed dual-path inductor is large while maintaining high Q, enabling to achieve low phase noise oscillation with octave frequency range. The inductances in the two modes of operation can be set independently, depending on the target frequencies. The inductan...Show More
An X-band LC VCO Using a New Boosted Active Capacitor With 53 % Tuning Range and -202.4 dBc/Hz FoMT
2020 IEEE/MTT-S International Microwave Symposium (IMS)
Year: 2020 | Conference Paper |
Cited by: Papers (5)
This paper presents a new boosted active-capacitor topology for wide tuning range voltage-controlled oscillators (VCO). A tuned inductor-based active-impedance-conversion circuit (LAIC) is used to multiply the capacitance of a capacitor bank and the negative-transconductance of LAIC in the proposed region of operation but without increasing losses. A boosted active-capacitor prototype in 65 nm CMO...Show More
A Ka-Band Dual-Band Digitally Controlled Oscillator With −195.1-dBc/Hz FoM ${_T}$ Based on a Compact High- $Q$ Dual-Path Phase-Switched Inductor
Joe Baylon;Pawan Agarwal;Luke Renaud;Sheikh Nijam Ali;Deukhyoun Heo
In this paper, a compact, low-loss, dual-path phase-switched inductor suitable for millimeter-wave (mmWave) transceiver subblocks is proposed. The signal path through the structure is determined by the relative polarity of two differential excitation signals applied to the four-port structure. Because inductance is varied by altering signal path through the inductor, signal-path MOSFET switches ar...Show More
Transformer-Based Predistortion Linearizer for High Linearity and High Modulation Efficiency in mm-Wave 5G CMOS Power Amplifiers
Sheikh Nijam Ali;Pawan Agarwal;Srinivasan Gopal;Deukhyoun Heo
This paper presents a new predistortion linearization technique for high linearity and high modulation efficiency in millimeter-wave (mm-wave) CMOS power amplifiers (PA) for fifth-generation (5G) mobile communications. Our proposed linearizer adopts a transformer-based (i.e., inductive) self-compensated predistortion network at the input of the PA whose amplitude-modulation to phase-modulation (AM...Show More
A 25–35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE
Sheikh Nijam Ali;Pawan Agarwal;Srinivasan Gopal;Shahriar Mirabbasi;Deukhyoun Heo
This paper presents a high-efficiency neutralized continuous class-F (CCF) CMOS power amplifier (PA) design technique for millimeter-wave (mmW) 5G mobile communications. A parasitic-aware tuned-load with a high-order harmonicresonance network is proposed to shape the current and voltage waveforms for the CCF PA. At mmW frequencies, the gate- drain capacitance (Cgd) creates adverse capacitive loadi...Show More
High-Performance and Small-Form Factor Near-Field Inductive Coupling for 3-D NoC
Srinivasan Gopal;Sourav Das;Pawan Agarwal;Sheikh Nijam Ali;Deukhyoun Heo;Partha Pratim Pande
Wireless interconnects using near-field inductive coupling (NFIC) enables contactless vertical communications necessary for the design of energy efficient and robust 3-D manycore systems. However, the achievable performance, energy efficiency, bandwidth, and associated area overhead of NFICs are intertwined imposing significant design challenges and tradeoffs to explore the optimum link configurat...Show More
An Echo-Canceller-Iess NFIC- TSV Hybrid 3D Interconnect for Simultaneous Bidirectional Vertical Communication
Srinivasan Gopal;Pawan Agarwal;Sheikh Nijam Ali;Joe Baylon;Deukhyoun Heo
2018 IEEE/MTT-S International Microwave Symposium - IMS
Year: 2018 | Conference Paper |
Cited by: Papers (4)
This paper presents an echo-canceller-less wireless-wireline hybrid 3D interconnect for simultaneous bidirectional (SBD) vertical communication. This is accomplished by combining wireless near-field inductive coupling channel (NFIC) that encompasses wireline through-silicon via (TSV) channels to form a bidirectional vertical link for the first time using face-to-back 3D integration technologies ap...Show More
A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS
Srinivasan Gopal;Pawan Agarwal;Joe Baylon;Luke Renaud;Sheikh Nijam Ali;Partha Pratim Pande;Deukhyoun Heo
Large-scale parallel implementation of matrix multiply and accumulate (MAC) core poses significant energy and area constraints in analog voltage domain under reduced supply voltage. A spatial multi-bit sub-1-V time-domain matrix multiplier interface is presented using multi-bit back-gate-driven delay elements as a scalable alternative for various approximate computing applications. A single-chip s...Show More
A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays
Sheikh Nijam Ali;Pawan Agarwal;Joe Baylon;Srinivasan Gopal;Luke Renaud;Deukhyoun Heo
2018 IEEE International Solid-State Circuits Conference - (ISSCC)
Year: 2018 | Conference Paper |
Cited by: Papers (67)
To fulfill the insatiable demand for high data-rates, the millimeter-wave (mmW) 5G communication standard will extensively use high-order complex-modulation schemes (e.g., QAM) with high peak-to-average power ratios (PAPRs) and large RF bandwidths. High-efficiency integrated CMOS power amplifiers (PA) are highly desirable for portable devices for improved battery life, reduced form factor, and low...Show More
A 40% PAE Frequency-Reconfigurable CMOS Power Amplifier With Tunable Gate–Drain Neutralization for 28-GHz 5G Radios
Sheikh Nijam Ali;Pawan Agarwal;Luke Renaud;Reza Molavi;Shahriar Mirabbasi;Partha Pratim Pande;Deukhyoun Heo
In this paper, a high-efficiency frequency-reconfigurable CMOS power amplifier (PA) design technique is presented at 24 and 28 GHz using integrated tunable neutralization and matching networks. To cope with the adverse effects of gate-drain capacitance (Cgd) in millimeter-wave (mm-wave) CMOS PAs in deep-submicrometer technologies, we propose a reconfigurable coupling-coefficient-based transformer....Show More
Zero-Power Feed-Forward Spur Cancelation for Supply-Regulated CMOS Ring PLLs
Pawan Agarwal;Jong-Hoon Kim;Partha Pratim Pande;Deukhyoun Heo
A new reference-spur cancelation technique is presented for supply-regulated ring-oscillator-based integer-N phaselocked loops (PLLs). A passive RC filter is used to implement a feed-forward (FF) spur-coupling path to perform spur cancelation at the PLL control signal. The proposed technique achieves a simulated spur cancelation of about 22 dB at the first spur harmonic. The simulated postcancelat...Show More
Reconfigurable high efficiency power amplifier with tunable coupling coefficient based transformer for 5G applications
2017 IEEE MTT-S International Microwave Symposium (IMS)
Year: 2017 | Conference Paper |
A frequency reconfigurable high efficiency power amplifier (PA) is presented for 5G applications using on-chip switchable matching networks. To cope with increased gate-drain capacitance (Cgd) in deep submicron CMOS PA design at mm-Wave frequencies, a tunable coupling-coefficient based transformer is proposed. This technique dramatically improves the neutralization of Cgd in a common-source PA whi...Show More
Current reuse triple-band signal source for multi-band wireless network-on-chip
Joe Baylon;Sheikh Nijam Ali;Pawan Agarwal;Srinivasan Gopal;Deukhyoun Heo
2017 IEEE MTT-S International Microwave Symposium (IMS)
Year: 2017 | Conference Paper |
Cited by: Papers (14)
A current reuse triple-band signal generator is proposed which simultaneously generates a first, second, and third harmonic output signal from a 26.5-30.2 GHz fundamental voltage controlled oscillator (VCO). Transformer-based Gm boosting and passive 2nd harmonic extraction is proposed to achieve a good performance with exceptionally low power. A low-voltage modified Gilbert cell mixer generates th...Show More
Reconfigurable phased-array design techniques for 5G and beyond communications
2017 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
Year: 2017 | Conference Paper |
Cited by: Papers (2)
This paper presents the design of multi-band millimeter-wave (mmW) phased-array communication systems for wideband applications. A multi-band matching network (MN) design is proposed using a novel low-loss reconfigurable-inductor (RI). Furthermore, a reconfigurable-transformer (RT) is shown for an accurate neutralization of the gate-drain capacitance (Cgd), which improves the efficiency and stabil...Show More
A 42–46.4% PAE continuous class-F power amplifier with Cgd neutralization at 26–34 GHz in 65 nm CMOS for 5G applications
Sheikh Nijam Ali;Pawan Agarwal;Shahriar Mirabbasi;Deukhyoun Heo
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
Year: 2017 | Conference Paper |
Cited by: Papers (8)
This paper presents a wideband high efficiency continuous class-F (CCF) power amplifier (PA) at mm-Wave frequencies for the first time. A tuned load with a high-order harmonic resonance network is used to shape the current and voltage waveforms for the proposed CCF CMOS PA. Further, a transformer with a tunable coupling-coefficient (ktune) is incorporated in the tuned load network to address the d...Show More
Switched Substrate-Shield-Based Low-Loss CMOS Inductors for Wide Tuning Range VCOs
Pawan Agarwal;Suman Prasad Sah;Reza Molavi;Shahriar Mirabbasi;Partha Pratim Pande;Seung Eel Oh;Jong-Hoon Kim;Deukhyoun Heo
A switched substrate-shield inductor (SSI) topology in bulk CMOS is proposed which minimizes parasitic capacitance and substrate losses, while tuned magnetically induced currents facilitate inductor tunability. The high frequency behavior of the induced current is analyzed, resulting in intuitive insights and design guidelines for a high-performance SSI. An SSI prototype in 65-nm bulk CMOS achieve...Show More
A low power sub-harmonic injection locked 2×2 mm-wave beamforming receiver array
2016 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2016 | Conference Paper |
Cited by: Papers (1)
A low power, 2×2 V-band beamforming receiver array using a local-oscillator (LO) phase-shifting approach is presented in this paper. Significant power savings in LO routing is achieved using an 8th sub-harmonic injection locked oscillator (SHILO), used for both frequency-multiplication and programmable phase-shift to implement beamforming. SHILO generates mm-Wave phase shift of ±90°. For low power...Show More
A 5.8 GHz and -192.9 dBc/Hz FoMT CMOS class-B capacitively-coupled VCO with Gm-enhancement
2016 IEEE MTT-S International Microwave Symposium (IMS)
Year: 2016 | Conference Paper |
Cited by: Papers (4)
This paper presents a novel gm enhancement method to minimize the oscillation start-up current in a CMOS voltage-controlled oscillator (VCO). A class-B biasing is achieved by extending the capacitive-feedback network, resulting in a larger output amplitude and hence a lower phase-noise. The flicker-noise of the tail current source is further minimized by self-biased switching current-sources. The ...Show More
2.45 GHz, 100 Mbps BPSK-DSSS transmitter for interference-robust wireless neuroprosthetic networks
Pawan Agarwal;Luke Renaud;Joe Baylon;Deyasini Majumdar;Deukhyoun Heo;Christian Schlegel
We present a 2.45 GHz 100 Mbps transmitter for body-implantable wireless neuroprosthetic links. Binary phase-shift keyed (BPSK) modulation with direct sequence spread-spectrum (DSSS) signaling and a 32-bit wide pseudo noise (PN) code is used to create energy-efficient interference-robust communication link. Power consumption is minimized by using a novel transmission-gate based low-loss passive mi...Show More
25.3 GHz, 4.1 mW VCO with 34.8% tuning range using a switched substrate-shield inductor
2015 IEEE MTT-S International Microwave Symposium
Year: 2015 | Conference Paper |
A wide tuning range CMOS VCO based on a switched substrate-shield inductor is presented. The proposed VCO uses a high quality factor, switchable inductor with smaller parasitics for frequency tuning range extension. Inductance is switched by controlling the eddy currents in a modified, floating substrate-shield. Using the proposed design, a 29 % inductance switching is achieved while maintaining a...Show More
A 8–40 GHz, 8 mW LNA with 27 dB peak gain and 5.2 dB NF for multiband applications
2014 9th European Microwave Integrated Circuit Conference
Year: 2014 | Conference Paper |
Cited by: Papers (2)
An extremely-wideband, 8-40 GHz, low power Low Noise Amplifier (LNA) is presented in this paper. The LNA utilizes a novel combination of design techniques, namely resistive feedback, emitter degeneration, and shunt-peaked split-inductor to provide wideband input and noise matching. Furthermore, the LNA is designed as 3-stage amplifier to provide better gain control through stagger-tuning method, t...Show More
A low power 8th sub-harmonic injection locked receiver for mm-Wave beamforming applications
2014 IEEE Radio Frequency Integrated Circuits Symposium
Year: 2014 | Conference Paper |
Cited by: Papers (3)
This paper presents a single element V-band low power 8th sub-harmonic injection locked beamforming receiver. A significant savings in local oscillator (LO) routing power is achieved by using an 8th sub-harmonic injection locked oscillator (SILO) for frequency multiplication and phase-shifting. Power consumption of the LNA and mixer is lowered by means of transformer feedback techniques. The propo...Show More
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