Loading [MathJax]/extensions/MathMenu.js

Tadashi Minotani - IEEE Xplore Author Profile

Scheduled Maintenance on Monday 1/13/2025

Single article sales and account management will be unavailable from 5:00 AM - 7:00 PM ET (09:00 - 23:00 UTC). We apologize for the inconvenience.

IEEE.org
IEEE Xplore
IEEE SA
IEEE Spectrum
More Sites

- Donate
- Personal Sign In

Access provided by:

MIT Libraries

Access provided by:

MIT Libraries

ADVANCED SEARCH

Author details

Tadashi Minotani

Also published under: T. Minotani

Publications

12

Citations

103

Publications by Year

19972023

Co-Authors:

K. EnpukuTakuro FujiiT. FurutaM. HaradaA. Hirata

Show All Co-Authors (36)

Tadashi Minotani

Also published under: T. Minotani

Affiliation

NTT Device Technology Labs

NTT Corporation

Kanagawa, Japan

Publication Topics

Blind Area,
Changes In Frequency,
Conductive Layer,
Electromagnetic Wave,
Frequency Response,
Impedance Sensor,
Measurement Frequency,
Resonance Frequency,
Resonant Length,
Waveguide Resonator,
65-nm CMOS,
Adjacent Channels

Biography

Tadashi Minotani (Member, IEEE) received the B.S., M.S., and Ph.D. degrees in electronic engineering from Kyushu University, Fukuoka, Japan, in 1995, 1997, and 2000, respectively. In 2000, he joined the NTT Telecommunications Energy Laboratories (now the NTT Device Technology Laboratories), Kanagawa, Japan. He received the 2002 Asia Pacific Microwave Conference APMC Prize. He is a member of IECE.(Based on document published on 9 August 2021).

Publications

12

Citations

103

Publications by Year

19972023

Co-Authors:

K. Enpuku
Takuro Fujii
T. Furuta
M. Harada
A. Hirata

Show All Co-Authors (36)

Author's Published Works

Search History

Showing 1-4 of 4 results

Conferences (4)

Sort

Filter Results

Show

Subscribed Content

Open Access Only

Range
Single Year
Gengsheng Chen(3)
Xiaofang Zhou(2)
Jiyuan Bai(2)
Zixiang Chen(1)
Zhenyin Zhang(1)
School of Microelectronics, Fudan University, Shanghai, China(3)
Jiashan Fudan Institute, Jiaxing, Zhejiang Province, China(3)
National Key Laboratory of Science and Technology on Communications, University of Electronic Science and Technology, Chengdu, Sichuan, China(1)
2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)(3)
23rd IEEE International SOC Conference(1)
IEEE(4)
Zhuhai, China(3)
Las Vegas, NV, USA(1)
2D Images(1)
3D Joint(1)
3D Mesh(1)
3D Method(1)
3D Pose(1)

Select All on Page

Sort By

Results

A Unified Verification Scheme for the Acceleration of RISC-V Processor Design

Zixiang Chen;Jiyuan Bai;Yueru Yu;Gengsheng Chen;Xiaofang Zhou

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

HTML

This paper presents a unified verification scheme for design and verification of large-scale complex digital systems. The new scheme integrates the software simulation environment and the hardware accelerating resources to undertake a unified and automated verification of large-scale digital circuit systems, encompassing test generation, result comparison, and coverage analysis. The non-synthesiza...Show More

A Unified Verification Scheme for the Acceleration of RISC-V Processor Design

Zixiang Chen;Jiyuan Bai;Yueru Yu;Gengsheng Chen;Xiaofang Zhou

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

Low Power Processor for IoT Device

Jincheng Li;Jiyuan Bai;Zelin Wang;GengSheng Chen;Xiaofang Zhou

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

HTML

Internet-of-Things(IoT) devices demand features such as long runtime, low heat dissipation and high reliability, as collecting and transmitting data under limited power supply. Therefore, there is a pressing demands for low power consumption and multi operation modes. Based on above requirements, we proposes ZCLP, a processor deploys clock gating and sleep mode. Prototypes are fabricated under TSM...Show More

Low Power Processor for IoT Device

Jincheng Li;Jiyuan Bai;Zelin Wang;GengSheng Chen;Xiaofang Zhou

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

SST: Simplified Space-Time Transformer Based on Time-Assisted Spatial MSA for 3D Human Pose Estimation

Sheng Lu;Qiyun Dong;Zhenyin Zhang;Gengsheng Chen;Yinna Zhu;Wei Xu

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

HTML

Depth ambiguity in 2D human joint estimation is a persistent issue for 2D-3D human pose estimation networks. To cope with this challenge, temporal dimensions are adopted in existing models, however, none of them are able to fully utilize the information embedded in the input data. In this paper, we present a Time-assisted Spatial (TaS) MSA & Simplified Space-Time Transformer (SST) to better captur...Show More

SST: Simplified Space-Time Transformer Based on Time-Assisted Spatial MSA for 3D Human Pose Estimation

Sheng Lu;Qiyun Dong;Zhenyin Zhang;Gengsheng Chen;Yinna Zhu;Wei Xu

2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

Year: 2024 | Conference Paper |

Energy and delay-aware mapping for real-time digital processing system on network on chip platforms

Yiou Chen;Jianhao Hu;Gengsheng Chen;Xiang Ling

23rd IEEE International SOC Conference

Year: 2010 | Conference Paper |

Cited by: Papers (2)

HTML

The mapping algorithm is one of the most important topics for Network on chip design. This paper proposes a new mapping algorithm, which uses an optimized energy model. In addition, we adopt a multiple-to-multiple mapping scheme to enhance concurrency and increase efficiency. The proposed approach uses NSGA-II to achieve the global optimal solutions for NoC platforms. The simulation results prove ...Show More

Energy and delay-aware mapping for real-time digital processing system on network on chip platforms

Yiou Chen;Jianhao Hu;Gengsheng Chen;Xiang Ling

23rd IEEE International SOC Conference

Year: 2010 | Conference Paper |

IEEE Personal Account

Change username/password

Purchase Details

Payment Options
View Purchased Documents

Profile Information

Communications Preferences
Profession and Education
Technical interests

Need Help?

US & Canada: +1 800 678 4333
Worldwide: +1 732 981 0060
Contact & Support

Follow

About IEEE Xplore | Contact Us | Help | Accessibility | Terms of Use | Nondiscrimination Policy | IEEE Ethics Reporting | Sitemap | IEEE Privacy Policy

A public charity, IEEE is the world's largest technical professional organization dedicated to advancing technology for the benefit of humanity.

© Copyright 2025 IEEE - All rights reserved, including rights for text and data mining and training of artificial intelligence and similar technologies.

IEEE Account

Change Username/Password
Update Address

Purchase Details

Payment Options
Order History
View Purchased Documents

Profile Information

Communications Preferences
Profession and Education
Technical Interests

Need Help?

US & Canada: +1 800 678 4333
Worldwide: +1 732 981 0060
Contact & Support

About IEEE Xplore
Contact Us
Help
Accessibility
Terms of Use
Nondiscrimination Policy
Sitemap
Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest technical professional organization dedicated to advancing technology for the benefit of humanity.
© Copyright 2025 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.

Test Whats new message.