Dead-Time Compensation Method in Cascaded H-Bridge Inverter to Mitigate Zero-Crossing Distortion by Reflecting the Ratio of Current Polarity

This letter proposes an enhanced dead-time compensation method in cascaded H-bridge (CHB) inverters to mitigate current zero-crossing distortion (ZCD) by reflecting the ratio of current polarity. Typically, dead-time compensation involves adding an offset voltage, whose sign is determined by the current polarity, to the switching reference voltage. However, in digital signal processor (DSP)–based CHB systems, when the current polarity changes, offset voltages with an incorrect sign might be applied for the following reasons. First, due to the shadow register function in DSP, the offset voltage from previous samples is applied. Second, because the DSP only measures current at sampling points, if the current polarity changes within a control period (i.e., between sampling points), it cannot recognize the polarity change until the next sampling point. These two deteriorate current ZCD. Therefore, when the current polarity changes, the proposed method predicts the reference current of the next sample to prevent incorrect offset voltage caused by the shadow register. Furthermore, by using the reference currents of the present and predicted values, the current polarity ratio within a control period is reflected in the offset voltage; thus, mitigating current ZCD. The validity of the proposed dead-time compensation method is verified through experimental results conducted with a seven-level CHB inverter.