Modeling and Characterization of Annealing Effect on the Cu Protrusion and Thermomechanically Behaviors of Through Glass Via

In the advanced packaging technology, the interposer for system-level packaging has been developed as next-generation substrates. Glass interposer as electronics substrate for 2.5-D/3-D IC integration has many advantages, and thus, through glass via (TGV) is becoming a potential substitute for through silicon via (TSV). However, the mismatch of thermal expansion coefficient between Cu via and glass interposer may lead to cracks, Cu protrusion, or delamination at the back end of line process. In this article, an annealing experiment is conducted at different temperatures and time to investigate the evolution of Cu protrusion and glass cracking under different annealing conditions. The top morphology of Cu protrusions of TGV samples is characterized using atomic force microscope and the height of the protrusion is measured. Scanning electron microscope (SEM) is used to observe the cross section of TGV samples. In addition, a finite element analysis (FEA) is used to simulate the Cu protrusions based on the elastic–plastic–creep model. TGV samples are annealed for 48 h to verify the reliability of the finite element model. After annealing at 400 °C for 48 h, the Cu protrusion can reach
$3.9~\mu $
m. After the annealing time reaches 1 h, cracks begin to appear. This article provides design guidelines for the pretreatment process and reliability evaluation of TGV. It is concluded that the annealing temperature and the annealing time should be carefully designed to reduce the risk of failure.