Real-Time spike sorting using an optimized STDP Spiking Neural Network on FPGA

Neural-recording devices have evolved to capture extensive data from neuronal populations, revealing valuable insights in the neuronal computation through the recordings of action potentials. Extracting this meaningful information from voluminous recordings is essential for unraveling the dynamics of biological neural networks, particularly if performed in real-time, it opens potential applications such as electroceutics and Brain-Machine-Interfaces (BMIs) as a treatment for neurodegenerative diseases. However, neuroprosthetics and BMIs require serious technological constraints regarding accuracy and power consumption. Despite the global interest in spike sorting, most approaches remain limited to offline processing, involve preprocessing steps or some supervision, limiting their potential for automated real-time processing. In this paper, we present the FPGA implementation of an unsupervised Spiking Neural Network (SNN) that performs spike sorting which can be efficiently implemented compared to traditional methods. Through several network optimizations, we are able to implement multiple SNNs for multi-channel processing on a single entry level FPGA with low latency, while maintaining the same accuracy as the software simulation. Moreover, the SNN is seamlessly integrated into a global system benefiting from of the AMD Zynq MPSoC architecture, facilitating efficient data transfer from recording devices to the SNN, and SNN output to custom devices, paving the way toward closed-loop systems which could result in neuroprosthetics and BMIs.