Current-Mode Transimpedance Sample-and-Hold using clocked Voltage Conveyor

In this paper, a current-mode Sample and Hold circuit with voltage output and a reduced input impedance is presented. The proposed circuit is based on a Second-Generation Voltage Conveyor (VCII) in a standard
$0.18 \mu\mathrm{m}$
CMOS technology. Some sensors, such as photodiodes, provide current signals that require a suitable interface to be properly detected. In addition, for autonomous multi-sensorial devices, reduced power consumption and small voltages are typically needed. The transimpedance behavior of the voltage conveyor make it suitable for interfacing with modern Analog-to-Digital conversion. Current and voltage buffering of the VCII can provide a good precision and dynamic range while maintaining reduced consumptions. In addition to this, a low output impedance is obtained to enhance driving capability. The proposed solution has been simulated using a standard 0.18
$\mu\mathrm{m}$
CMOS technology, and operates at
$\pm 0.75\mathrm{V}$
power supply, achieving an input impedance of 68
$\Omega$
with an input dynamic range of
$\pm 10\mu \mathrm{A}$
and a static power consumption of 74
$\mu \mathrm{W}$
. The use of a small 0.3
$\text{pF}$
capacitor allowed the system to achieve a settling time smaller than 50 ns settling with an accuracy error is approximately equal to 1%, allowing a sampling rate of 20 MHz.