A Confined Storage Nitride 3D-NAND Cell with WL Airgap for Cell-To-Cell Interference Reduction and Improved Program Performances

We demonstrated a confined storage nitride (SN) 3D-NAND cell with an innovative process flow including WL airgap formation. Airgaps strongly reduced WL parasitic capacitance which translates into better program time
$(\mathrm{t}_{\text{prog}})$
performances. A complete device characterization has been carried out on a test memory array. We measured substantial cell-to-cell interference (C2C) improvements and lateral charge loss (LCL) reduction, which make this cell a key enabler of further tier pitch (TP) scaling in future 3D-NAND arrays. Program-erase (PE) window limitations due to trapped charge confinement were also addressed by TCAD modeling, showing that PE window can be recovered by SN film thickness changes with no C2C penalty.