Design of a High CMTI Level Shifting Circuit for GaN Gate Driver ICs

In this paper, a level shift device with high CMTI performance and low delay is designed for GaN half-bridge drivers. The circuit uses current mirror to realize level shift, which can effectively reduce transmission delay while maintaining high bandwidth structure. uses the current comparator to eliminate the first-order common-mode current generated by the switching node switching, and reduces the influence of the second-order channel length current through double cross-coupling. In this paper, the SMIC 0.18 um BCD process is used to verify the proposed floating level shift circuit based on the Cadence platform, and the simulation results show that the proposed floating level shift circuit has a rising edge delay of 2 ns and a falling edge delay of 4.5 ns from input to output. dV/dt noise capability up to 300 V/ns. Since this floating-level shift circuit only operates when the pulse is triggered, it has zero quiescent current. When the switch is in normal operation, it has an average dynamic current of 608 uA.