Co-design of Si-Photonic Segmented Mach-Zehnder Modulators and Distributed CMOS Drivers for Co-packaged Optics

The demand for higher data rates and lower power consumption in data centers has driven the development of co-packaged optics (CPO). This paper presents challenges and benefits set by the integration of Si-Photonic segmented Mach-Zehnder modulator (MZM) and distributed CMOS driver. Conventional traveling-wave Mach-Zehnder Modulators (MZMs) are being designed with segmented structures to reduce their footprint and enhance integration while maintaining high linearity, high bandwidth, and low insertion loss. However, this approach also brings challenges such as the increased complexity in optical and electrical chip design and the requirement to matching the velocity of electrical and optical signals. By dividing the 180-nm SOI-CMOS silicon-photonic MZM into two stages of traveling-wave MZMs with a length ratio of 2: 1 and employing a 65-nm CMOS distributed push-pull driver circuit for modulation, this work achieves a high extinction ratio, wide bandwidth, and flexible operation. In light of this system architecture, the electrical chip has been enhanced with data and clock recovery (CDR) circuit, thereby facilitating its capability to directly receive PAM4 signals. The CDR recovers and demodulates PAM4 data into dual nonreturn to zero (NRZ) streams for the co-designed MZM digital-analog converter (DAC). Expanding upon the mentioned foundation, the MZM is proposed to segment into smaller units and each unit is treated as a lumped capacitance-type load. Integrating this multi-segment design with CDR encoding enables the functionality of an optical domain digital-to-analog converter (O-DAC). Additionally, by employing voltage-mode driving circuits, higher modulation efficiency and energy efficiency is achieved.