Advanced Silicon Technologies: Design Consequences of Scaling Solutions for Devices

Despite multiple roadblocks and 'red-brick” walls identified on its path, the Moore's Law continues towards single Angstrom digits, promising further improvements in device density and energy efficiency. FinFET and Nanosheet technologies bring 3-rd dimension to device design, and new back-side power rail schemes decouple power delivery from signal lines. All those new technology solutions change the way the circuits and products are designed, manufactured, packaged, and tested. This paper reviews the impact the technology scaling has on various components of SoC and their designs.