Hardware accelerator based on SIMT programmable rasterization

Rasterization plays a key role in graphics rendering and is an important component in determining the performance of a graphics processor. In this paper, we introduce a SIMT processor-based programmable rasterization hardware gas pedal, which aims to improve the flexibility and performance of triangle rasterization processing. The gas pedal uses the scanline algorithm and shared memory to effectively reduce the scanning time and invalid pixel point access time. By synthesizing it on a Xilinx FPGA chip, it supports a maximum operating frequency of up to 125 MHz. Experimental results show that the accelerator pedal designed in this paper has a significant improvement in flexibility and rendering speed. Rasterization; SIMT processor; scanline algorithm;