Anlu NP: The Abstract Level Modeling of Network Processor for Agile Hardware Design

As chip architectures become more and more complex, traditional system-level and function-level simulation brings problems such as difficulty in debugging and slow speed in execution. In this paper, we propose an abstract-level simulation model for a network processor, which ignores most hardware and functional details. It only focuses on the components that are decisive for network system performance. As a result, we significantly reduced the modeling complexity of network processors and accelerated simulations by 5 to 8 times. This provides an efficient approach for agile hardware design and architecture exploration of network processors.