Design and Analysis of Widlar Current Mirror Circuit using Tunnel FET: CADENCE Simulation Study

MOSFETs have the capability to enhance their performance and integrate more transistors on a single chip by reducing their physical parameters, such as gate length and oxide thickness. However, scaling MOSFETs below 20 nm introduces certain issues, including DIBL, OFF-state current is increased due to gate oxide thinning, and other short-channel effects. To address these concerns, alternative components resembling MOSFETs, like tunnelling field effect transistors (TFETs), have emerged in the market. TFETs offer various improvements over traditional MOSFETs, including low power consumption, a lower supply voltage requirement, and the potential for high-speed operation. These distinctive characteristics position TFETs as promising candidates for future energy-efficient and low-power electronic systems. In this investigation, the performance of TFETs as Widlar current mirror circuit have been evaluated and compared with the standard MOSFET circuit. The results indicated that TFETbased current mirror circuits outperform those based on MOSFETs. Consequently, while designing low-power circuits, TFETs prove to be a superior choice compared to MOSFETs.