A Novel SiC Trench MOSFET with Unilateral Deep P Buried Layer for Improved Short-circuit Capability

A novel silicon carbide (SiC) trench MOSFET with unilateral deep P buried layer (UP-MOS) for improved short-circuit performance is proposed and characterized in this article. The unilateral deep P buried layer not only increases the difficulty of carrier transport by extending the length of the JFET region, but also suppresses the short-channel effects by shielding the drain potential, which reduces the saturation current and short-circuit peak current. Furthermore, the dual-channel design ensures the conduction capability of the proposed structure. Numerical simulation results demonstrate that the switching loss and short-circuit withstand time of the proposed SiC UP-MOS are reduced by 31% and extended by 2.25 times, respectively, compared with the asymmetric trench MOSFET (AT-MOS) without sacrificing conduction capability. The improved performance and reliability indicate that SiC UP-MOS is a competitive and reliable candidate for electric vehicles.