Comparative Study and Analysis of Memristor Based SRAM

Memoriesare an integral part of any electronic system. SRAM is a crucial component in modern Digital System-On-Chip designs and it occupies almost 65–75 percent of the chip area. It plays a significant role in various applications such as implantable bio-medical devices, portable devices, body sensor networks, and more. The scaling of transistors has caused stability issue SRAM cells. The increase in numbers of transistors on chip increases the power consumption and also increases the delay. The non-volatile memories are becoming increasingly crucial in design of memory because of their ability to retain data during even when the power is off. Unlike 6-transistor Static Random-Access Memory (6T-SRAM) cells, which are volatile, memristors represent a non-volatile technique which is employed in Non-Volatile SRAM (NVSRAM). Memristors have enhanced memory design by imparting non-volatility, low leakage, and instant-on features to the system. There are numerous approaches to incorporating memristors into SRAM design, showcasing their versatility in improving memory performance and efficiency. In this paper SRAM cells based on various memristor models are analysed in terms of power consumption and propagation delay at 90 nm PTM technology. The conventional 6 T SRAM cells are compared and studied with memristor based models developed by Biolek [1], Joglekar and Wolf [2], and Yakopcic[3], and comparative performance analysis has been made. All the simulations were carried out in LTSpice and it has been observed that the 4T2M Yakopcic [3] modelled SRAM exhibits a lower power consumption and reduced delay compared to other models [4].