Practical study on gate drive distribution network for multiple discrete IGBT device paralleling for a 90kW inverter

Utilizing paralleled discrete devices to develop high-power onboard converter products is attracting huge industrial interest due to their cost advantage over power modules. However, current imbalance issue-related system reliability impairment and derating become a prevalent challenge when the number of devices in parallel gets large. Besides ensuring a highly symmetrical current commutation path, a well-designed gate drive system plays a crucial role in achieving good current sharing. This study focuses on the gate drive distribution network of a three-phase 90kW inverter prototype, in which each switch consists of four 1200V-75A discrete IGBT devices in parallel. A single-phase H bridge of this inverter is tested with three gate drive distribution board variants, to investigate the impact of gate drive resistor network and loop inductance on the current sharing among paralleled devices. Ansys Q3D is used to extract the gate drive loop parasitic inductance, double pulse tests are further conducted and current sharing are measured. Experimental results shows that a gate drive network with small communal gate resistors together with a large external gate resistor and a small or null emitter resistor, is preferable for multiple paralleling applications.