A Multiloop Layout SiC Power Module for Power Loop Inductance Reduction with Reverse Current Coupling

In this paper, an innovative layout is introduced to reduce stray inductance of the multichip power modules through reverse coupling of current in parallel power loops, which effectively cancels out mutual inductance. The proposed reverse-coupling loops layout significantly reduces overshoot voltage and mitigates current imbalance among parallel loops within SiC power module. Through double pulse test verification, the designed SiC power module is shown to achieve a power loop inductance of 3.5nH, offering a reduction of 4.3nH compared to traditional commercial modules at same current ratings. Moreover, the module exhibits a reduction in V
DS
voltage overshoot by about 23V and a decrease in switching losses by nearly 440μ J when compared to conventional modules, under the test conditions of 400V/120A.