Application-Architecture Mapping for Energy-Efficiency and High-Performance in Network-on-Chip-Based Manycore Architectures

Application mapping to network-on-chip (NoC)-based manycore architectures is a challenging problem due to various factors, including numerous cores on a chip or multiple chips, heterogeneity of computing and communication resources, dynamically changing demands of applications, and conflicting requirements on energy and performance. The main goal of this work is to co-optimize application-architecture mapping and resource allocation/configuration on manycore systems interconnected by NoC. Machine learning (ML), heuristics, and linear programming (LP) models are discussed as solutions to allocate resources for the tasks of applications and configure the NoC resources for energy efficiency and high performance for both systems/networks and applications, including deep learning.