UVM Based Verification of an Ethernet MAC using Wishbone Bus

Ethernet is a wired computer networking technology used for connecting computer to another digital device. It is standardized as IEEE 802.3, which has been improved to accommodate faster data transfers with more nodes and longer network with longer networking length while retaining a significant amount of compatibility. Ethernet is specified for certain speeds of operation from 1Mb/s to 400Gb/s using a common media access control (MAC) specification. The carrier sense multiple access with collision detection (CSMA/CD) protocol specifies shared medium full duplex and half duplex. The wishbone bus, master used for sending data into memory and slave used for getting data from the memory. Ethernet MAC with wishbone Master and Slave interface is used to check the functionality using System Verilog Environment (OOPS) and UVM (Universal Verification Methodology).