Study and Analysis on CNTFET Design and Process Parameters for Performance Optimization

Carbon Nanotube Field Effect Transistor (CNTFET) technology is one of the favorable devices to replace MOSFET technology. A lot of research has been done to further enhance the CNTFET performance. This paper studies the implementation of Taguchi method to further optimize CNTFET design parameters. In this research, the HSPICE simulator is used to simulate the Stanford University CNFET model. The factors involved in the design of experiment include the diameter of CNT, oxide thickness and the dielectric constant. By using Taguchi method, the optimum combination of the three-design parameter is 1.0nm of CNT, 1.0 nm of oxide layer and Zirconium Dioxide (25) as the dielectric material. The optimum CNTFET design manages to produce the highest current ratio (Ion/Ioff. The ANOVA analysis is used to evaluate the percentage of each design parameter that affects the current ratio of the CNTFET. The result shows that the diameter of CNT had a significant effect towards the current ratio of 87.24%. The optimized CNTFET is applied to an inverter circuit to study the circuit performance in terms of propagation delay, power consumption and Power-Delay Product (PDP). From the study, the optimized CNTFET inverter had a better performance in term of PDP with $4.1984 \text{x}10^{-18}\text{J}$ compared to unoptimized CNTFET inverter design.