Design and analysis of the Chameleon scheduling algorithm for reconfigurable computing

New wireless communication standards require implementing algorithms in a new way, since the computational demands are beyond that of traditional signal processors, and technology is changing too rapidly for conventional hardware to meet these demands. The design of wireless base stations will evolve over time, and reconfigurable processing is essential to supporting current and future requirements, as well as meeting dynamic factors and evolving standards. With the rapid advancement of wireless standardization, new services and features are being developed at a much faster rate than previously possible. The Chameleon reconfigurable processor allows developers to work on algorithm prototype models on development modules.