Testing of Analog Circuits using Statistical and Machine Learning Techniques

The field of integrated circuits has undergone re-markable changes over the past decades. With the increasing demand for performance constraints and the ever-reducing size of the Integrated circuits chips, analog and mixed-signal designs have become indispensable and increasingly complex in modern CMOS technologies. The traditional method for testing analog circuits, which is still commonly used in the industry today, makes sure that the circuits comply with all of the specifications set forth in the data sheet. But a specification-based testing technique suffers from high test costs brought on by prolonged testing on pricey test equipment. The situation has only become worse in recent years to the point where analog circuit test costs are frequently reported to be as much as 50 % of the total test costs despite analog components taking up less than 5% of the chip size. In this work, both fault detection and diagnosis techniques have been presented via statistical and machine learning by processing the output response of the corresponding faulty circuit in a non-conventional domain (i.e., statistical and time-frequency domain).