Interactive Analysis of Post-Silicon Validation Data

Analyzing post-silicon validation datasets to spot bugs and obtain hints for design improvements challenges validation engineers with complex and sometimes subtle problems. Through experience, engineers gain accuracy and speed in recognizing the cause of a problem, but analyzing the data remains a tedious and time-consuming process involving substantial manual effort. Sometimes, validation engineers just have a gut feeling regarding the cause, and in many cases they can find themselves at a loss in understanding the cause of a problem. This work presents a new approach that visually supports validation engineers in debugging chips during the post-silicon validation phase. It was developed as part of a collaboration between visualization researchers and post-silicon validation domain experts, aiming at tackling complex problems that present subtle differences between test case outcomes.