Hysteresis-free behavior of MoS2 negative capacitance transistor by using low-temperature grown HfO2 as encapsulation layer

A MoS
2
negative-capacitance field-effect transistor (NCFET) with 6-nm Hf
0.5
Zr
0.5
O
2
(HZO) as ferroelectric layer and 2-nm Al
2
O
3
as dielectric layer plus a 2-nm low-temperature grown HfO
2
as encapsulation layer is fabricated. Improved device performance, especially hysteresis behavior, is obtained as compared to its counterpart without the encapsulation layer: an almost hysteresis-free behavior (5–20 mV), a subthreshold swing of 36.2 mV/dec and an on/off current ratio of
$2.8\times 10^{7}$
. The improved hysteresis should be associated with enhanced screen effects on charged-impurity scattering and protection from absorption of environmental gas/water molecules by the thin high
$k$
encapsulation.