Power Analysis Methodology for Energy Harvesting System on Chip

In this work, a novel power analysis methodology is proposed, aiming to successful simulation and accurate power drop analysis of fully integrated energy harvesting SoCs. The proposed methodology exploits the PySPICE open-source Python module and the NgSPICE open-source simulator, enabling full-chip rapid power analysis and large signal – transient results’ extraction. A D-latch 9-stage ring oscillator scheme is implemented in a nanometer CMOS process, as the basic cell of the product vehicle. The cell emulates the power contribution of the energy harvesting system’s digital block. Advanced power grid parasitics-aware simulations’ results are presented, accompanied with the simulation performance metrics, to validate the power analysis methodology. The presented technique enables power simulation-aware package and PCB design.