ESD-ability Enhancement of High Voltage pLDMOSs with the Discrete Source Side

The ESD capability of high-voltage pLDMOSs is improved in this paper by adding discrete HVPB distributions in the source side. There are five modified devices are investigated in this work, which are the discrete half HVPB and discrete HVPB with NPN, PNP, NPNP, PNPN arranged types. From the TLP testing results, the trigger voltage (V
t1
), holding voltage (V
h
), and secondary breakdown current (I
t2
) of these samples can be obtained. Finally, it can be found that the ESD capability can be enhanced by adding discrete HVPB distributions in the source side. This means that the ESD ability of these devices can be increased by increasing the conduction cross-sectional area of the discrete HVPB conduction path at the source end. It is found that the design of the pLD_HVPB_npnp modulation type is optimal as it has, the most pronounced increase in I
t2
. And it is nearly 1.24 times higher than the reference device.