A 40Gb/s PAM4 Baud-Rate CDR with Equal-Slope Algorithm

This paper presents a 40Gb/s PAM4 baud-rate clock and data recovery (CDR) with equal-slope (ES) algorithm. Comparing to MM-CDR, whether equipped with feedforward equalizer (FFE) on transmitter (TX) side or not, ES-CDR has advantages in recovered eye-height and timing margin by optimizing sampling point, while avoiding extra hardware cost. Realized in 28nm CMOS process, the ES-CDR showcases x7 orders of magnitude lower bit error rate (BER) for 12dB loss at 40Gb/s PAM4.