Development of a Modified 63-Level Asymmetric Multi-Level Inverter to Minimize THD

In this paper, a modified single-phase 63-level asymmetric multi-level inverter (MLI) topology is proposed to reduce THD. The sinusoidally modulated staircase switching technique is utilized to control level generating circuitry to produce only positive voltage across H-Bridge terminals. H-Bridge circuitry is used to generate polarities. In this technique, optimal switch count is considered for this topology. The proposed topology was analyzed in MATLAB/SIMULINK and also a mathematical analysis was done for THD calculation. In both analyses, the THD was found 0.27% for the modified topology. For experimental validation of this modified topology, a prototype was developed and tested in the laboratory. The experimental waveform for a 60W electric bulb is shown in this paper. Finally, The THD of output voltage and efficiency of the inverter were found 1.13% and 93.7% respectively using HIOKI PW3337 POWER METER.