Comparative Analysis of Switching Schemes for 8-bit Arrays in Binary DACs

This paper analyzes switching schemes in Digital-to-Analog Converters (DACs). A switching scheme allows compensating systematic errors that appeared during integrated circuit fabrication. Switching schemes are applicable both for binary and unary DACs. In binary DACs, switching schemes can reduce both differential nonlinearity (DNL) and integral nonlinearity (INL). Previously, a comparative analysis of schemes for 6-bit DACs was published. However, another popular resolution - 8 bits - still requires a detailed overview and comparison of corresponding switching schemes. In this paper, results of function-level simulation for 14 8-bit switching schemes are presented. Deterministic PACES switching scheme demonstrates the best result in both differential nonlinearity reduction and integral nonlinearity reduction. Moreover, to understand which placement properties provide nonlinearity reduction, we propose to use deviation maps. Recommendations about more important properties are given.