Test Response Compaction for Software-Based Self-Test

Software-based self-test (SBST) is a promising solution to online self-testing of processor cores. SBST can comple-ment scan-chain-based approaches without additional hardware to improve self-test fault coverage. One of the challenges to SBST is the size of memory required to store the fault-free test responses. To reduce the memory overhead, this paper proposes a response compaction algorithm. In addition to significantly reducing the test response footprint, the algorithm is designed to incur low aliasing probability and be software friendly, i.e., it can be efficiently implemented with instructions available in most processors. Validated on a MIPS32 processor, the proposed compaction algorithm reduces the test response footprint by 84% and incurs no aliasing case.