Digital Pre-Distortion for CS- DACs based on Inverse Modelling of Volterra Series Expansion

This paper presents a dynamic digital pre-distortion (DPD) method for a current-steering digital-to-analog converter (CS-DAC). The novel proposed method is based on the inverse modelling of a Volterra series expansion of the system. It uses a memory structure often only used for DPD in power amplifiers (PA). The goal is to find a model with minimal parameter count to counteract the signal dependent non-linearites of charge injection from the switching activity of the converter. A priori knowledge of the non-linear behavior and architecture of the DAC is exploited. The DPD uses an indirect learning architecture to generate the inverse system. The proposed Volterra system consists of a first and third order kernel with a respective memory depth of one. This results in a total number of 6 parameters that need to be estimated. This is sufficient to significantly attenuate the non-linear distortions. The evaluation of the proposed DPD is done via Spice simulations of a 14-bit lumped model of the CS-DAC. Small and wideband discrete multi-tone (DMT) signals with a frequency of up to 684 MHz are simulated. The results show a performance gain of the missing-tone-power-ratio MTPR of up 8.4dB.