Optimization of CMOS Voltage reference with Prediction based on Multi-group Hierarchical Collaborative Evolution and GBDT

An automatic design system for the voltage reference circuit is presented in this paper. The multi-group hierarchical collaborative evolution algorithm is proposed to automatically generate the circuit structures and intelligently optimize the parameters of the circuits. In order to improve the convergence speed and reduce the optimization time, the gradient boosting decision tree (GBDT) algorithm is introduced to establish the circuit prediction model. In this paper, the automatic design of the CMOS reference source circuit is implemented in a standard 0.18μ m process. Compared with previous work, the number of iterations is reduced by 20%, the optimization time is decreased by 20.48%, the line sensitivity and temperature coefficient are improved by 65.42% and 15.47%, respectively, and the circuit power consumption is reduced by 22.50%.