NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models

In this paper, we propose NNASIM, an efficient timing and area accurate event-driven simulator for custom DNN accelerators. NNASIM is a highly-modular and highly parameterized modeling framework. We build accurate timing and area models for common accelerator modules like GEMM, ALU array, and crossbar using ASIC synthesis flows. These models are fed into the event-driven simulator for fast simulation. NNASIM is integrated with a RISC-V simulator. This approach guarantees the functional correctness of the accelerator simulation at the instruction level. The experimental results show that our model evaluates the performance and area of DNN accelerators with less than 0.76% and 2.83% error, respectively, compared to RTL implementations. NNASIM allows designers to model the performance and area of the accelerator at a high level, and thus enables the systematic microarchitecture design space exploration of the custom accelerators.

I. Introduction

With scaling benefits ending, more and more designers are now working on Domain-Specific Architectures (DSAs). Especially, because of the recent phenomenal popularity of Artificial Intelligence, the dedicated hardware accelerators with both performance enhancement and energy efficiency for Deep Neural Networks (DNNs) have received tremendous interest [1] [2] [3] [4] both in academia and industry. Among previously proposed custom DNN accelerator architectures, 2D spatial array architecture is a prominent choice [1] [2]. vector-based execution array used in such as NVDLA [5].