Evaluation of a Novel Scratchpad Memory through Compiler Supported Simulation

Local Memory Store (LMStore) is a novel hardware-controlled, compiler-managed Scratchpad memory (SPM) design [1], with an initial research evaluation that showed its possibility for improving program performance. This initial evaluation was performed over memory traces prior to the development of compiler support for LMStore. In this paper, we present compiler support for the LMStore design, and present experimental results that better evaluate LMStore performance. Experimental results on benchmarks from Malardalen benchmark suite [2] executing on the LMStore architecture modeled in Multi2Sim demonstrate that a hybrid LMStore-Cache architecture improves execution time by an average of 19.8 %, compared to a conventional cache-only architecture.