A 128ksps 120dB THD Low Noise Analog Front End

This paper describes a complete analog to digital front-end system consisting of a programmable gain two stage capacitive gain amplifier (CGA) driving a multistage delta-sigma ADC. It features a 60kHz bandwidth and 1ppm/FSR linearity at low gains (
$\mathrm{G}\leq 8$
) and 3ppm/FSR at high gains (
$\mathrm{G}> 8$
). At a gain of 128, it achieves an input referred noise of 5.5nV/√Hz at a power consumption of 43mW.