Novel Configuration of Multilevel Inverter Topology with Less Number of Switches

As suggested in title, this paper discuss about a new inverter topology that uses reduced number of switches when compared to conventional inverter topologies. The main objective for this inverter topology is to reduce the number of switches that are being used in inverter design yet to get a desirable output without using PWM and filters. This will solve the issue of more cost for purchasing more switches as well as cost for creating their firing circuitry and also the cost that one mat also need to bear for filter components which plays a predominant role in reduction of cost of circuit. This paper also discusses about some key observations which may help in reduction of THD of output waveform by changing duty cycle of switches. Additionally, this paper also provides mathematical relation between THD and Fourier coefficients along with relation between Fourier coefficients and switching times which helps in reduction of THD. These equations help in determining the switching times and duty cycle of switches just before practical experimentation which serves a greater help saving time and help one to move in direction instead of random experimentation.