Circuit-level Thermal Modelling of Silicon Photonic Transceiver Array using Machine Learning

Silicon photonics (SiPho) is a promising technology for enabling low power and high-speed optical transceivers, which are commonly used in inter/intra-data center communication links. In order to scale the communication data rate, transceivers employ multiple channels in parallel. Each channel is handled by a unit cell consisting of multiple thermally sensitive elements, such as ring modulators and wavelength filters. To combat this sensitivity, the devices are equipped with integrated heater elements which allow for temperature stabilisation. In this paper a methodology is proposed which allows to do multiscale thermal modelling of a transceiver array. Proper orthogonal decomposition (POD) is combined with radial basis functions (RBF) as a machine learning method which reduces computational complexity of models with a large number of degrees of freedom. The reduced order circuit-level model is used for the calculation of thermal coupling coefficients between unit cells. Device level finite element (FE) simulations are done in order to calculate heater efficiency. Finally, all results are combined in a lumped-parameter circuit-level model. This model allows to predict exactly how much heater power is required within each unit cell in order to achieve uniform temperature stabilisation.