Indium-based Flip-chip Interconnection for Superconducting Quantum Computing Application

As one of the mainstream physical implementation methods for quantum computing, superconducting qubit has gained much attention in recent years. However, commonly-used wire-bonding technique for signal transporting between external classical processor and internal qubits in lateral circuit plane cannot support enough number of physical qubits to build up computationally-useful, fault-tolerant, error corrected quantum computer due to signal crosstalk and decoherence effect caused by bonding wire. Therefore, advanced packaging technology in semiconductor industry such as flip-chip has been adopted to replace conventional wire-bonding technique, extending the vertical dimension to further improve the qubit integration density. In this work, we have completely demonstrated a fabrication process of flip-chip bonding scheme which is compatible with superconducting qubits, obtaining high mechanical reliability, satisfying DC/microwave transporting performance and superior bondability without introducing lossy material. Due to cryogenic working requirement of qubit, the constituent materials are required to possess superconducting characteristic, which is uncommon in conventional IC package.Herein, we construct functional test vehicles using 50-μmdiameter microbumps in 100 μm pitch based on Al/TiN/In/Au symmetric flip-chip bonding structure, which is respectively corresponding to RDL, diffusion barrier, bump, and antioxidant layer. Based on above basic structure, we have fabricated daisy chain structure for measurement of DC resistance change during cool-down process, transmission line structure for evaluation of microwave transporting performance and sealing ring structure for hermeticity test.X-Ray, step profiler and confocal microscope system show that high-uniformity bumps are all arranged in correct position without obvious defects and short connection between adjacent bumps. Die shear test is conducted exhibiting an average strength of 12.9 MPa, strong enough for holding and further processing. Cross-section morphology are inspected by FIB and SEM, showing a clearly layered microstructure without obvious defects. Standard helium leak test is carried out using overall 20 sealing ring samples, showing eligible leakage rate based on MIL-STD-883 standard, which opens up possibilities for ultra-high vacuum quantum package which will be probably applied for environmental protection and electromagnetic shield in future 3D packaging architecture of superconducting qubits. Electrical test results show reasonable microwave S21 curve with certain performance of superconducting characteristic within operating frequency range of qubits under cryogenic temperature and shows certain degree of resistance drop during cool-down process. These results have systematically demonstrated the feasibility of implementing scalable superconducting quantum processors in higher integration density through indium-based flip-chip technique.