A Voltage-Mode Design for a Spectrum Channelizer with PWM-LO Based Sub-band Gain Control

A spectrum channelizer employing a frequency-folded analog-to-digital converter (FF-ADC) architecture with the ability to control the amplitude of LO harmonics using pulse-width-modulated LOs (PWM-LOs), that uses voltage-mode downconversion is described in this work. The approach requires a single voltage-mode input amplifier to drive the downconversion switches. Frequency-folding and sub-band gain control are achieved in a single signal path. This is in contrast to prior work that used a current-mode approach, and required a main FF-ADC path and a separate auxiliary path for sub-band gain control. By avoiding the requirement for an auxiliary input path, the approach presented here is shown to significantly simplify the signal chain, with identical gain-scaling capability.

I. Introduction

Broadband receivers are required in various applications, such as receivers for full-band or concurrent multi-band reception of broadband signals and broadband spectrum analyzers. Direct sampling (DS) architectures [1] that employ high-speed analog-to-digital converters (ADCs) have been explored as an attractive implementation for the digitization of broadband input signals. In order to enable high sampling rates with good power efficiency performance, a time-interleaved (TI) ADC [2] with multiple sub-ADCs that individually operate at a lower sampling rate can be employed in this approach.