Impact of tunneling length on analog/RF performance of L-shaped TFET

The influence of technological downscaling significantly escalate the vulnerability of semiconductor based devices. The influence of tunneling length variation on the performance of single gate SiGe-based (for source region) L-shaped TFET (SiGe-SGL-TFET) are examined in terms of channel length present between the source and gate oxide (Lateral tunneling length (L
T
)). This research work carried out to analyze the influence of various L
T
values on the bending of band at SCJ (source channel junction), Electric field, ON-state current (I
on
), ON-voltage (V
on
) and sub-threshold swing (SS). In addition, the effect of L
T
variation on analog and high frequency FOMs (figure of merits) also analyzed. SiGe based SGL-TFET shows optimum performance when L
T
set to 3nm. The V
on
of proposed device increased as L
T
increases from 3nm to 9nm. Simulation results show that, enhanced analog/RF FOMs achieved for 3nm L
T
.