Ultra-high Voltage BCD Technology Integrated 1000 V 3-D Split-Superjunction devices

A 0.25 µm ultra-high voltage Bipolar CMOS DMOS (BCD) process platform is reported in this work, which integrates the 1000 V 3-D Split-Superjunction lateral double-diffused metal–oxide semiconductor (split-SJ LDMOS) with ultra-low specific on-resistance R
on,sp
. The split-SJ LDMOS features split N- and P-pillars in the drift region to optimize the electric field near the drain and continuous pillars in the termination region for the continuous depletion. The highly doped SJ region also acts as a low resistance current path in the on-state to realize a lower R
on,sp
. By optimizing the split-SJ layout, doping dose and field plates, the split-SJ LDMOS was fabricated with an ultra-high voltage V
B
of 1002 V. A tested R
on,sp
of 12.1 Ω•mm
²
was observed in the split-SJ LDMOS, which is 36.73% lower than the theoretical limit of the triple RESURF technology under the same V
B
. This SJ-based ultrahigh voltage BCD technology also provides other variable integrated devices, including 1000 V nJFET, asymmetrical 120 V / 150 V LDMOS, 7.5 V to 80 V CMOS, 20 V NPN and PNP, and poly resistor.