Speed-Up Gate Pulse Method to Suppress Switching Loss and Surge Voltage for MOS Gate Power Devices

There is a trade-off between surge voltage and switching loss in power semiconductors, and it has been difficult to reduce both. In order to solve this problem, the digital gate drive method has been studied. However, the digital gate drive method has the problem that the gate drive circuit is complicated and it takes time to search for the optimal drive waveform. In this study, we have proposed a new method that does not require optimization search, but only adds a simple circuit, which is expected to have the same effect as the digital gate drive method.